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A Guide to CPU Cores and Processor IP Focusing on CPU, DSP, and GPU Third Edition Published April 2012 Authors: Kevin Krewell and J. Scott Gardner Single License: $3,495 (single copy, one user) |
Everyone Needs IP
With rising transistor budgets and the trend toward system-on-a-chip design, designing an entire complex ASIC or ASSP in house has become increasingly impractical. As a result, the market for licensed function blocks, known as intellectual property (IP), is growing rapidly. The most popular IP blocks are programmable processors such as CPUs and DSPs. As system designers place more emphasis on differentiation through sophisticated user interfaces, we have seen surging interest in graphics processor units (GPUs) as well.
Several suppliers provide CPU IP, each offering unique advantages. Some CPUs are easily customized, others are superscalar, while still others support multiprocessor implementations. The realm of DSP IP is similarly complex. Driven by market requirements for high-definition audio and 3G/4G cellular, suppliers have developed several different approaches to handling these demanding signal-processing tasks. GPUs can accelerate 2D, 3D, and/or vector graphics using fixed or programmable engines. For all types of IP, the available options range widely in performance, die area, and power.
"A Guide to CPU Cores and Processor IP" sorts through these options, evaluating the high-performance designs available from the leading IP vendors. The report provides in-depth coverage of CPUs, DSPs, and GPUs, including ARM, CEVA, IBM, Imagination Technologies, MIPS, Synopsys (ARC), Tensilica, and Vivante. Also covered are Adapteva, Aeroflex Gaisler, Beyond Semiconductor, Cognovo, Coresonic, Cortus, Digital Media Professionals (DMP), EnSilica, NXP, and VeriSilicon.
Make the Right Choice
For each vendor, we describe each IP core offered, provide key metrics such as performance and die area, discuss important topics such as development tools and support, outline the future roadmap, and summarize the strengths and weaknesses of the offering. The report also provides background on how IP is used, an overview of common end markets such as consumer electronics and networking equipment, and market share and forecast data for the types of IP covered. We conclude with a side-by-side comparison of IP cores and our long-term views on the industry.
As the leading vendor of technology analysis for mobile and communications chips, The Linley Group has the expertise to deliver a comprehensive look at this burgeoning market. Analysts Kevin Krewelll and Scott Gardner use their extensive experience in the semiconductor market to deliver the technical and strategic information you need to make informed business decisions.
Whether you are looking for an innovative solution for your design, a vendor to partner with, or a rising company to invest in, this report will cut your research time and save you money. Get the inside scoop on this major market. Order “A Guide to CPU Cores and Processor IP" today.
This report is written for:
- Engineers who need to select IP for the ASICs or standard products (ASSPs) they are designing
- Marketing and engineering staff at companies that sell IP, design services, or software that runs on processor IP
- Technology professionals who want an introduction to CPU, DSP,GPU, or video technology
- Financial analysts who desire a detailed analysis and comparison of IP companies and their chances of success
- Press and public relations professionals who need to get up to speed on IP technology
What's New in this Edition
Updates to the Third Edition of "A Guide to CPU Cores and Processor IP"
"A Guide to CPU Cores and Processor IP" has been updated to incorporate new announcements made since the publication of the previous edition.
Here are some of the many changes you will find:
- Added coverage of 64-bit ARM (v8 ISA), Cortex-A7, Big.Little, and updated roadmap
- Added coverage of MIPS-64 CPU cores
- Added coverage of Tensilica’s HiFi 3 and BBE32UE
- Added coverage of CEVA's XC4000 and an unannounced product
- Added coverage of Vivante’s newest GC series of GPUs
- Expanded coverage of licensable 32/64-bit CPUs for embedded devices, servers and PCs
- Expanded coverage of DSP for high-end audio and 4G baseband processing
- Expanded coverage of GPUs for mobile devices, including smartphones and tablets
- New coverage of floating-point IP supplier, Adapteva
- All new comparisons for DSPs, CPUs and GPUs
- 2011 market-size and vendor-share data
- Updated market forecast through 2015
| Figure 1-1. Handset market segmentation in 2011 |
| Figure 1-2. Block diagram of generic basic phone |
| Figure 1-3. Block diagram of generic application processor |
| Figure 1-4. Block diagram of generic mobile Wi-Fi chip |
| Figure 1-5. Block diagram of generic digital TV chip |
| Figure 1-6. Block diagram of generic 802.11 access point |
| Figure 1-7. Block diagram of generic high-end hard-drive controller |
| Figure 1-8. Block diagram of processor with vector-graphics acceleration |
| Figure 2-1. Logic circuit that implements simple Verilog code |
| Figure 2-2. GDS II file being edited in Magic |
| Figure 2-3. Worst-case scenario for Blu-ray Disc audio |
| Figure 2-4. Raster graphics appear blocky when enlarged |
| Figure 2-5. Apple's Cover Flow effect |
| Figure 2-6. Standard hard-wired 3D pipeline |
| Figure 2-7. Standard programmable 3D pipeline |
| Figure 2-8. OFDM demodulation pipeline |
| Figure 3-1. CPU pipelining examples |
| Figure 3-2. Generic multicore processor |
| Figure 3-3. Interleaved tasks on a multithreaded processor |
| Figure 3-4. Block diagram of a generic CPU |
| Figure 3-5. Block diagram of a classic XY DSP |
| Figure 3-6. Basic design of a shader-based 3D GPU |
| Figure 4-1. Unit market share for 32/64-bit CPU IP, 2011 |
| Figure 4-2. Unit market share for DSP IP, 2011 |
| Figure 4-3. Unit market share for GPU IP, 2011 |
| Figure 4-4. Shipments of CPU IP by application category, 2011 |
| Figure 4-5. DSP-IP shipments by application category, 2011 |
| Figure 4-6. Mobile-device forecast, 2009-2016. |
| Figure 4-7. Digital-home device forecast, 2009-2016 |
| Figure 4-8. Enterprise device forecast, 2009-2016 |
| Figure 4-9. Embedded device forecast, 2009-2016 |
| Figure 4-10. Forecast of CPU IP by application category, 2009-2016 |
| Figure 4-11. DSP-IP forecast by application category, 2009-2016 |
| Figure 4-12. GPU-IP forecast by application category, 2009-2016 |
| Figure 5-1. Block diagram of ARM Cortex-A15 CPU |
| Figure 5-2. Block diagram of ARM Cortex-A7 CPU |
| Figure 5-3. Block diagram of ARM Cortex-A9 CPU |
| Figure 5-4. Block diagram of ARM Big.Little system architecture |
| Figure 5-5. Block diagram of ARM Mali-400 MP GPU |
| Figure 5-6. Block diagram of ARM Mali-604/658 GPU |
| Figure 6-1. Block diagram of Ceva TeakLite-III DSP |
| Figure 6-2. Block diagram of Ceva-X1641 DSP |
| Figure 6-3. Block diagram of Ceva-XC DSP |
| Figure 6-4. Block diagram of Ceva-XC4000 DSP |
| Figure 7-1. Block diagram of IBM PowerPC 460-S CPU |
| Figure 7-2. Block diagram of IBM PowerPC 470-S CPU |
| Figure 7-3. IBM PowerPC 470 in a multiprocessor configuration |
| Figure 8-1. Block diagram of Imagination Technologies SGX GPU |
| Figure 9-1. MIPS 74K and 1074K integer pipeline diagram |
| Figure 9-2. MIPS 1004K and 1074K multi-CPU configuration |
| Figure 10-1. Block diagram of Synopsys ARC 700 with interfaces |
| Figure 11-1. Tensilica Xtensa processor architectural diagram |
| Figure 11-2. Block diagram of a packet classifier based on Xtensa |
| Figure 11-3. Block diagram of Tensilica ConnX BBE64 |
| Figure 11-4. Block Diagram of Tensilica HiFi 3 VLIW architecture |
| Figure 12-1. Block diagram of Vivante graphics processor |
| Figure 13-1. Block diagram of Adapteva's Epiphany CPU |
| Figure 13-2. Block diagram of Coresonic SIMT architecture |
| Table 2-1. Standard screen sizes |
| Table 2-2. 2G, 3G, and 4G cellular technologies and data rate |
| Table 2-3. Common LTE data rate |
| Table 5-1. Key parameters for selected ARM Cortex core |
| Table 5-2. Key parameters for ARM Mali graphics processor |
| Table 6-1. Key parameters for Ceva TeakLite-III and TeakLite-4 DSP |
| Table 6-2. Product matrix for Ceva-XC4000 famil |
| Table 6-3. Comparison of Ceva-XC DSP familie |
| Table 7-1. Key parameters for IBM PowerPC 405-S and 460-S CPU core |
| Table 7-2. Key parameters for IBM PowerPC 476FP CP |
| Table 8-1. Imagination PowerVR SGX version |
| Table 8-2. Key parameters for Imagination SGX graphics processor |
| Table 8-3. Key parameters for Imagination HTP265 and MTP230 CPU/DS |
| Table 9-1. Key parameters for MIPS CPU core |
| Table 10-1. Key parameters for selected Synopsys ARC core |
| Table 11-1. Key parameters for Tensilica 570T CP |
| Table 11-2. Key parameters for selected Tensilica ConnX DSP |
| Table 11-3. Key parameters for Tensilica HiFi audio processor |
| Table 12-1. Key parameters for production Vivante graphics processor |
| Table 12-2. Key parameters for future Vivante graphics processor |
| Table 13-1. Semiconductor-IP suppliers and product |
| Table 13-2. Key parameters for Aeroflex Gaisler Leon3 and Leon |
| Table 13-3. Key parameters for Beyond Semiconductor CPU core |
| Table 13-4. Key parameters for Cortus APS3, APS5, and FPS6 CPU core |
| Table 13-5. Key parameters for EnSilica ESI-3200 and ESI-3250 CPU core |
| Table 13-6. Key parameters for NXP CoolFlux DSP |
| Table 13-7. Key parameters for VeriSilicon ZSP DSP core |
| Table 14-1. Comparison of midrange CPU core |
| Table 14-2. Comparison of superscalar CPU core |
| Table 14-3. Key features of ARM Cortex-A1 |
| Table 14-4. Comparison of hard CPU core |
| Table 14-5. Comparison of high-performance general-purpose DSP core |
| Table 14-6. Comparison of DSP cores for handset baseban |
| Table 14-7. Comparison of DSP cores for infrastructure baseban |
| Table 14-8. Comparison of audio-processing core |
| Table 14-9. Comparison of low-cost GPU core |
| Table 14-10. Comparison of midrange GPU core |
| Table 14-11. Comparison of high-end GPU core |
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